Skip to content

Differentiating SAR and Delta-Sigma ADCs: An Overview

Decision between Successive-Approximation-Register and Delta-Sigma Converter in design process hinges on prioritizing resolution needs... (Sponsored by: Texas Instruments)

Difference Between Switching Amplifier (SAR) and Delta-Sigma (ΔΣ) Analog-to-Digital Converters...
Difference Between Switching Amplifier (SAR) and Delta-Sigma (ΔΣ) Analog-to-Digital Converters (ADCs)

Differentiating SAR and Delta-Sigma ADCs: An Overview

Analog-to-Digital Converters (ADCs) play a crucial role in digital electronics, converting continuous analog signals into discrete digital values. Two common types of ADCs are the Successive Approximation Register (SAR) and Delta-Sigma (ΔΣ) ADCs, each offering distinct advantages and trade-offs in terms of resolution, sampling speed, and noise reduction.

Resolution

Delta-Sigma ADCs provide higher resolution due to their oversampling and noise-shaping techniques. This architecture is well-suited for precise measurements, such as audio applications or strain and pressure sensing, often achieving very fine quantization by trading off speed for detail [1][3]. On the other hand, SAR ADCs offer moderate resolution, sufficient for many industrial and consumer applications. The resolution is typically lower than Delta-Sigma ADCs but adequate for many use cases where ultra-high resolution is not critical [1][3].

Sampling Speed

SAR ADCs have faster sampling speeds compared to Delta-Sigma ADCs, making SAR suitable for applications requiring relatively quick conversions with a good compromise between speed and power consumption [1][3][4]. Delta-Sigma ADCs operate at slower effective sampling rates because they rely on oversampling followed by digital filtering and decimation, which introduces latency. Their continuous, free-running conversion style is less compatible with high-speed real-time sampling [1][3].

Noise Reduction

Delta-Sigma ADCs excel in noise reduction by employing oversampling and noise shaping, which pushes quantization noise out of the band of interest. Their decimation filters further reduce noise, resulting in excellent signal-to-noise ratios and effective anti-aliasing filtering [1][3][4]. SAR ADCs do not inherently perform noise shaping or oversampling and thus generally have poorer noise performance compared to Delta-Sigma ADCs. However, they typically have lower noise floors than flash ADCs and balance noise, speed, and power reasonably [3][4].

Practical Applications

In summary, SAR ADCs are advantageous when moderate resolution and higher sampling speeds with efficient power consumption are needed. Delta-Sigma ADCs are preferable when very high resolution and strong noise reduction are important, but sampling speed is less critical. This makes SAR ADCs well-suited for general-purpose and embedded applications, while Delta-Sigma ADCs are ideal for precision instrumentation, audio, and sensors requiring low noise and high resolution [1][3][4][5].

SAR IC converters are available in sizes from 8 to 18 bits, with greater bit count resulting in greater resolution and accuracy. It's essential to consider the type of ADC when designing a new electronic product, as the choice can significantly impact the performance and suitability of the final product.

Key Components and Processes

The successive-approximation ADC uses a digital to analog converter (DAC) and a comparator to convert the analog signal to digital. The main circuit of a ΔΣ converter is the modulator, which produces a serial pulse train from the D flip flop (FF) whose density is proportional to the input voltage level. The sample-and-hold (S/H) amplifier in a successive-approximation ADC charges/discharges to the input voltage and ensures that the voltage at the input to the comparator is constant during the conversion process. The digital value of the analog sample taken at the input is in the SAR and can be read directly in parallel after conversion.

In some applications, the S/H amplifier may not be necessary for lower-resolution and lower-sampling-rate applications. The conversion time for a SAR ADC is the clock period times the number of SAR bits. For a 16-bit SAR and a clock speed of 2 MHz, the conversion time is 8 μs. The net output data word rate of the ΔΣ is lower than the sampling rate by the decimation factor, and is usually in the kilosamples-per-second (ksamples/s) range.

References: [1] Analog Devices, Inc. (2021). Analog Devices ADC Comparison Guide. Retrieved from https://www.analog.com/en/resources/articles/comparing-adcs.html [2] Texas Instruments. (2021). ADCs. Retrieved from https://www.ti.com/analog/products/adc.html [3] Linear Technology Corporation. (2021). ADCs. Retrieved from https://www.analog.com/en/products/adc.html [4] Maxim Integrated. (2021). ADCs. Retrieved from https://www.maximintegrated.com/products/analog/analog-to-digital-converters.html [5] National Semiconductor. (2021). ADCs. Retrieved from https://www.texasinstruments.com/analog/adc.aspx

  1. The architectural differences in data-and-cloud-computing technology are evident in the design of Analog-to-Digital Converters (ADCs), with Delta-Sigma ADCs utilizing oversampling and noise-shaping techniques for higher resolution, while SAR ADCs offer moderately fast sampling speeds suitable for applications requiring efficient power consumption.
  2. In the realm of technology, SAR ADCs and Delta-Sigma ADCs, being key components in the field of data-and-cloud-computing, each have their distinct advantages and trade-offs, with SAR ADCs excelling in moderate resolution and higher sampling speeds, and Delta-Sigma ADCs shining in high resolution and strong noise reduction, making them suitable for different practical applications.

Read also:

    Latest