PCB Design Strategies Advised by Rick Hartley to Reduce Electromagnetic Interference
In the world of high-speed PCB design, managing Electromagnetic Interference (EMI) is a critical concern. Rick Hartley, a seasoned professional with over 50 years of experience in handling signal integrity issues, offers valuable insights on minimizing EMI.
Hartley recommends several key design considerations to achieve this goal. First and foremost, selecting the right material for high-speed designs is crucial. The "High-Speed Material Design Guide" is a resource that provides information on this subject. Hartley suggests choosing materials with low Dk values to lower losses in high-speed designs.
Optimizing the PCB stack-up is another essential aspect of reducing EMI. Hartley advises controlling impedance precisely through fabrication, managing controlled impedance routing, and placing the reference plane close to the signal layer to avert EMI issues. Improper stack-up with a ground plane placed two or more dielectrics away from the signal/power layer will cause signal degradation.
When it comes to design-for-manufacturability (DFM) guidelines, they play a significant role in enhancing EMC. Hartley emphasizes considering these guidelines when designing controlled impedance traces, as they impact the fabrication process. Adhering to IPC Class 3 layout rules is also important to avoid unconnected lines that can cause EMI.
Termination strategies are crucial in controlling reflections, while reducing crosstalk is essential for good signal integrity. Incorporating ICs with built-in pre-emphasis and equalization can help reduce losses in high-speed designs.
Hartley also stresses the importance of proper grounding. Proper grounding provides a continuous return path for limiting EMI. Breaking out a 0.5 mm BGA requires pretty fine line technology, so fine-line routing for BGA is recommended to handle high-density interconnect.
Preparing designs for EMC compliance testing is equally important. Hartley suggests doing this through structured operation modes and load boxes to ensure reliability and meet regulatory standards.
The Signal Integrity eBook is another valuable resource, containing information on impedance discontinuities, crosstalk, reflections, via stubs, and more. The PCB design engineers are available to help with signal integrity issues in designs.
In the cost-driven industries like IoT and automotive, high-performance PCB with a lower layer count is the way forward. Reducing the layer count is a way to achieve higher density and controlled impedance traces in lower layer count circuit boards. However, maintaining signal integrity is not an easy task, especially in these boards.
Rick Hartley, the principal engineer at RHartley Enterprises, specializes in preventing and solving EMI and signal integrity problems. His practical advice, ranging from optimizing capacitor placement for low inductance to reducing noise, bridges EMC theory and real-world implementation, helping to build interference-free, high-performance electronic systems.
Technology plays a vital role in managing Electromagnetic Interference (EMI) in high-speed PCB design. For instance, controlling impedance precisely through fabrication and managing controlled impedance routing, as recommended by Rick Hartley, pertains to advanced PCB technology.
The PCB design engineers, who are available to help with signal integrity issues in designs, provide valuable insights through resources such as the Signal Integrity eBook, which contains information on various aspects influencing signal integrity. This technology-driven approach aims to create interference-free, high-performance electronic systems.
